Pierre's Library
Resources for OS Development

Buses - 7 documents in this section

Accelerated Graphics Port (AGP)

AGP 2 Interface Spec

By Intel. Published 05/04/1998. Entry added 02/01/2005.
Keywords: bus agp accelerated graphic port
File: agp2.0.pdf (2.75 Mb)

« The Accelerated Graphics Port (AGP or A.G.P.) is a high performance, component level interconnect targeted at 3D graphical display applications. A.G.P. is based on a set of performance extensions or enhancements to the PCI bus. This document specifies the A.G.P. interface, and provides some design suggestions for effectively using it in high performance 3D graphics display applications. »


AGP 3 Interface Spec

By Intel. Published 11/01/2002. Entry added 02/01/2005.
Keywords: bus agp accelerated graphic port
File: agp3.0.pdf (564 Kb)

« The AGP V3.0 Interface Specification (or AGP3.0) describes enhancements to the Accelerated Graphics Port (AGP) Interface. AGP3.0 offers a significant increase in performance along with feature enhancements to AGP2.0. This interface represents the natural evolution from the existing AGP to meet the ever-increasing demands placed on the graphic interfaces within the workstation and desktop environments. »

 

Peripheral Component Interconnect (PCI)

PCI BIOS Spec v2

By PCI-SIG. Published 07/20/1993. Entry added 02/01/2005.
Keywords: bus pci peripheral component interconnect bios software interface
File: PCI_BIOS_Spec_v2.pdf (2.75 Mb)

« This document describes the software interface presented by the PCI BIOS functions. This interface provides a hardware independent method of managing PCI devices in a host computer. »


PCI 2.2 Local Bus Spec

By PIC-SIG. Published 12/18/1998. Entry added 02/01/2005.
Keywords: bus pci peripheral component interconnect spec
File: PCI_Local_Bus_Spec_v2.2.pdf (3.42 Mb)

« The PCI Local Bus is a high performance 32-bit or 64-bit bus with multiplexed address and data lines. The bus is intended for use as an interconnect mechanism between highly integrated peripheral controller components, peripheral add-in boards and processormemory systems. »


PCI IDE Controller Spec

By PIC-SIG. Published 03/04/1994. Entry added 06/19/2005.
Keywords: bus pci peripheral component interconnect spec ide controller
File: PCI_IDE_Controller_Spec.pdf (3.42 Mb)

« This document defines the necessary characteristics of a PCI-based IDE controller so that device independent software (i.e.; BIOSes) can identify and properly configure the device. »

 

Universal Serial Bus (USB)

USB 1.1 Spec

By Compaq/Intel/Microsoft/NEC. Published 09/23/1998. Entry added 02/01/2005.
Keywords: bus usb universal serial bus spec
File: USB_1.1_Spec.pdf (1.72 Mb)

« This document defines an industry-standard USB. The specification describes the bus attributes, the protocol definition, types of transactions, bus management, and the programming interface required to design and build systems and peripherals that are compliant with this standard. »


USB 2 Spec

By Compaq/HP/Intel/Lucent/Microsoft/NEC/Philips. Published 04/27/2000. Entry added 02/01/2005.
Keywords: bus usb universal serial bus spec
File: USB_2.0_Spec.pdf (5.35 Mb)

« This document defines an industry-standard USB. The specification describes the bus attributes, the protocol definition, types of transactions, bus management, and the programming interface required to design and build systems and peripherals that are compliant with this standard. »


USB In a Nutshell

By Craig Peacock. Published 05/09/2002. Entry added 02/01/2005.
Keywords: bus usb universal serial bus nutshell
File: USB_in_a_Nutshell.pdf

« Now lets face it, (1) most of us are here to develop USB peripherals and (2) it's common to read a standard and still have no idea how to implement a device. So in the next 7 chapters we focus on the relevant parts needed to develop a USB device. This allows you to grab a grasp of USB and its issues allowing you to further research the issues specific to your application. »

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